Regional Principal Product Application Engineer

Astera Labs

  • San Jose, California, United States
  • $185,000 - $240,000 a year
  • Posted Aug 19, 2026
Sign up — let your agent apply Sign in

BestApply tailors your resume and applies for you.

System Bring-upC ProgrammingFirmware DevelopmentSilicon BringupHigh-Speed OscilloscopePython scriptingPCIe 6.0DebugBERTPCIe 5.0PCIeCXL

Job description

About the role

As a Principal Product Application Engineer leading the Asia region (China), you will provide technical guidance to customers, create product collateral, drive design‑in and debug of PCIe/CXL silicon, coordinate with headquarters teams, and act as the technical owner for issue resolution while collaborating with customers, FAEs and sales during Asia‑Pacific business hours.

About the company

Astera Labs (NASDAQ: ALAB) builds rack‑scale AI infrastructure through purpose‑built connectivity solutions, integrating CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor technologies with its COSMOS software suite to deliver flexible, end‑to‑end connectivity for hyperscalers and ecosystem partners.

Requirements

  • Bachelor’s degree in Electrical Engineering (Master’s preferred).
  • Minimum 3 years experience designing complex SoC/silicon products with high‑speed interfaces, preferably PCIe.
  • Full professional proficiency in written and spoken Mandarin.
  • Strong knowledge of PCIe LTSSM at the physical layer, associated standards and debugging, with hands‑on experience on PCIe 5.0 (PCIe 6.0/CXL a plus).
  • Silicon/system bring‑up and debug experience in customer environments.
  • Demonstrated technical ownership of issue resolution and ability to drive cross‑functional teams.
  • Hands‑on experience with lab equipment such as protocol analyzers/exercisers, high‑speed oscilloscopes, and BERTs.
  • Comfort developing firmware in C and scripting in Python or similar languages.
  • Experience triaging complex customer issues across silicon, firmware, hardware and system layers (preferred).
  • Familiarity with data‑center BMC implementation and BIOS configuration (preferred).
  • Experience developing or supporting PCIe or Ethernet switch or retimer products (preferred).
  • Knowledge of PCIe compliance testing methodology and troubleshooting (preferred).
  • Understanding of data‑center systems such as servers, JBODs, networking switches and routers (preferred).
  • Willingness to work approximately 12:00 PM‑9:00 PM PST to align with Asia‑Pacific stakeholders.